Dataset containing the monitoring of various hardware performance counters (HPCs) associated with the proof of concept for 16 side-channel attacks (access-retired, evict-reload, fence-flush, flush-fault, flush-fault-ret, flush-flush, flush-reload, ghostwrite, iflush-reload, interrupt-timing, page-walk, spectre-rsb, spectre-v1, spectre-v2, timer-drift, tlb-evict); some are successful and others are not, modified so that the attack occurs more frequently, along with the data obtained for 16 benign programs/reference sets (bitcoin, bubble-sort, bzip2, coremark, dhrystone, ffmpeg, mandelbrot, matrix, mybench, polybench, sha256sum, sieve, speedtest, stream, stress_c, stress_m). All programs are executed on a RISC-V architecture, specifically the Xuantie C910 processor, with RV64GCV architecture.

The selection of hardware attacks used to collect the data was carried out by analyzing the characteristics of the computer, as well as the available mitigations, to determine whether the machine was vulnerable to each of them. It was concluded that all attacks were successful except evict-reload, flush-fault, flush-flush, spectre-v1, and tlb-evict; which failed in some of their iterations. These attacks were included to consider all possible malicious strategies available when training the agent.

The selection of benign programs was mainly based on reference sets that offered reliable and reproducible execution behavior, thus allowing effective comparison with the attack workloads. A selection of different reference sets with varied approaches was made to ensure optimal coverage of the dataset.

Finally, data from all available counters on the Xuantie C910 processor were collected one by one and then merged into a single dataset for each program for analysis. The time column is approximate and should not used to train the agent.